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Impacts of interface contaminations on the MoS2 field effect transistors and a modified fabrication process to pursuit better interface quality.

Nanotechnology 2019 May 17
The interface of the two-dimensional material plays a crucial role in the properties of the material itself. When 2D materials are used as channel for electrical devices, negative influence from surface contaminations during fabrication process should be avoided to ensure the device performance and the reliability. In this article, the impacts as well as its mechanisms of interface contaminations on MoS2 field effect transistors were studied. An effective method using an atomic layer deposition (ALD) grown Al2O3 dielectric layer to reduce exposure time of MoS2 during processing was introduced. Combine with annealing process, the fabricated MoS2 FETs with a Al2O3 protective layer demonstrate a high On/Off current ratio of 5Χ107, and a hysteresis of 80 mV in terms of decent reliability. Sulfur repair mechanism on MoS2/Al2O3 interface during annealing is revealed to explained the enhancement of devices performance. This method can also be adopted in other 2D materials, paving a path for the next generation flexible electronics application.

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