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Pixel based biosensor for enhanced control: Silicon nanowires monolithically integrated with field-effect transistors in fully depleted silicon on insulator technology.

Nanotechnology 2019 Februrary 6
Silicon nanowires (SiNWs) are widely used technology for sensing applications. Complementary metal-oxide-semiconductor (CMOS) integration of SiNWs advances lab-on-chip (LOC) technology and offers opportunities for read-out circuit integration, selective and multiplexed detection. In this work, we propose novel scalable pixel based biosensors exploiting the integration of SiNWs with CMOS in fully-depleted silicon-on-insulator (FDSOI) technology. A detailed description of the wafer-scale fabrication of SiNW pixel using the CMOS compatible sidewall-transfer-lithography (STL) as an alternative to widely investigated time inefficient e-beam lithography is presented. Each 60 nm wide SiNWs sensor is monolithically connected to a control transistor and novel on-chip fluid-gate forming an individual pixel that can be operated in two modes: biasing transistor frontgate (V<sub>G</sub>) or substrate backgate (V<sub>BG</sub>). We also present the first electrical results of single N and P-type SiNW pixels. In frontgate mode, N and P-type SiNW pixels exhibit SS ≈ 70 - 80 mV/dec and I<sub>on</sub>/I<sub>off </sub> ≈ 10<sup>5</sup>. The N-type and P-type pixel has an average threshold voltage, V<sub>th</sub> of -1.7 V and 0.85 V respectively. In the backgate mode, N and P-type SiNW pixels exhibit SS ≈ 100 - 150 mV/dec and I<sub>on</sub>/I<sub>off </sub> ≈ 10<sup>6</sup>. The N and P-type pixel has an average V<sub>th</sub> of 5 V and -2.5 V respectively. Further, the influence of the backgate and frontgate voltage on the switching characteristics of the SiNW pixels is also studied. In the frontgate mode, the V<sub>th</sub> of the SiNW pixel can be tuned at 0.2 V for 1 V change in V<sub>BG</sub> for N-type or at -0.2 V for -1 V change in V<sub>BG</sub> for P-type respectively. In the backgate mode, it is found that for stable operation of the pixels, the V<sub>G</sub> of the N and P-type transistor must be in the range 0.5 to 2.5 V and 0 V to -2.5 V respectively.

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